An Effect of Output Capacitor ESL on Hysteretic PLL Controlled Multiphase Buck Converter

M. Jelinek, J. Jakovenko

An Effect of Output Capacitor ESL on Hysteretic PLL Controlled Multiphase Buck Converter

Číslo: 2/2017
Periodikum: Radioengineering Journal
DOI: 10.13164/re.2017.0515

Klíčová slova: SMPS, Buck, hysteretic mode control, interleaving, PLL, multi-phase, SMPS, Buck, řízení hystereze, prokládání, PLL, vícefázové.

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Anotace: This paper provides analysis of output capacitor effects to phase stability of a hysteretic mode controlled buck converter. The hysteretic control method is a simple and fast control technique for switched-mode converters, but the hysteresis control is not oscillator referenced. It results in difficulty to achieve stable switching phase and frequency. In recent papers, the authors propose a use of phase locked loops (PLL) to permit interleaved multiphase operation where each voltage regulator (VR) module is coupled together via output node and leads to a strong loop interaction. In this work analysis of this interaction is studied by Matlab Simulink simulations and a new solution how to partially suppress this effect is given. The proposed method confirms the theoretical analysis.