Analysis of BDMOS and DTMOS Current Mirrors in 130 nm CMOS Technology

Matej Rakus, Viera Stopjakova, Daniel Arbet

Analysis of BDMOS and DTMOS Current Mirrors in 130 nm CMOS Technology

Číslo: 2/2018
Periodikum: Advances in Electrical and Electronic Engineering
ISBN: 1804-3119
DOI: 10.15598/aeee.v16i2.2747

Klíčová slova: Analog circuits; bulk-driven; current mirrors; dynamic-threshold; low-voltage circuits, Analogové obvody; hromadné řízení; proudové zrcadla; dynamický prah; nízkonapěťové obvody

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Anotace: In this paper, an analysis of basic Current Mirror (CM) topologies was performed with a focus on comparison of conventional realization to Bulk-Driven (BD) and Dynamic-Threshold (DT) equivalents, in terms of main properties. These circuits were designed in 130 nm CMOS technology using the supply voltage of 0.6 V and laid out on a test-chip. Fabricated circuits were analyzed and their characteristics compared to the simulation results. The achieved results prove that these unconventional circuit design techniques are quite promising for contemporary ultra low-voltage analog Integrated Circuits (ICs)