ESD Stress Analysis and Suppression in a Single-Junction Thermal Converter

Thato Ernest Kgakatsi, Eugene Golovins, Johan Venter

ESD Stress Analysis and Suppression in a Single-Junction Thermal Converter

Číslo: 1/2022
Periodikum: Advances in Electrical and Electronic Engineering
DOI: 10.15598/aeee.v20i1.4115

Klíčová slova: Electromagnetic transients; electrostatic discharges; metrology; nonlinear circuits; power dissipation.

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Anotace: This article presents an outline of Electric Transient Disturbances (ETDs), represented by the ElectroStatic Discharge (ESD) in accordance with the Human-Body Model (HBM), on the AC-DC transfer measurement standard, represented by the Single-Junction Thermal Converter (SJTC) Thermal Element (TE). Mitigation technique against the power dissipation build-up, higher than the operational margins recommended by a manufacturer, on the TE were proposed and modelled using Laplace Transform (LT) analysis. A mathematical model and an optimization algorithm were developed to determine the equivalent circuit model parameters of a Transient Overload Protection Module (TOPM) that would offer adequate protection against destructive power dissipation levels build-up on the TE. The mathematical model was developed using an 8 kV ESD, which was expected to deliver short-circuit current with a peak value of approximately 5.33 A through a load impedance of approximately 1 m\varOmega. The ESD stress signal was injected into the TOPM connected in parallel with the TE. The active power dissipated by the SJTC TE per period of transient response was calculated from the current and voltage obtained from the mathematical analysis, and the results indicate a power dissipation of 10 mW by the TE. From the algorithm, the model parameter that noticeably influences the power dissipation capabilities of the TOPM is the inductance and it must be smaller than 1.2 nH. A CAD based simulation model was developed and analysed. The simulation results agreed with the mathematical model.